Presentations at CS International 2026 are grouped into 5 key themes which collectively provide complete coverage of the compound semiconductor industry.
If you are interested in speaking at CS International 2026, please contact info@cs-international.net or call +44 (0)24 7671 8970.
Computer modeling has become a reliable workhorse in the semiconductor industry, capturing complex physical and chemical phenomena and providing valuable knowledge. As the demand for GaN-on-Si power devices increases, the industry requires solutions that can translate reactor recipes directly into material performance. In this work, we demonstrate the newest capabilities of STR’s modeling software for the analysis and optimization of GaN MOCVD processes. These capabilities establish a direct correlation between growth regimes and epilayer properties, including thickness, composition, dopant/impurity concentration, and point defects. Furthermore, a new approach enables the convenient optimization of growth recipes to achieve an optimal combination of structural and electrical characteristics. This simultaneous improvement of wafer-level uniformity and electrical performance significantly reduces R&D cycles, supporting the transition toward high-yield, large-scale GaN manufacturing.
Over the past decade, imec has been supporting the power semiconductor industry with the enablement of GaN technologies offering a comprehensive industrial affiliation program to mutualize R&D efforts and licensing the intellectual property generated within and outside its partner consortium. These efforts spent on 200mm from the start resulted in the availability of 200V/650V and 40V/100V p-GaN HEMT technology platforms soon complemented with their monolithic integration derivatives based on Resistor Transistor Logic and built on Silicon or SOI with Deep Trench Isolation allowing GaN Power Integrated Circuits to be designed. The ongoing Artificial Intelligence revolution is reshaping data centers and compute system architectures. New power semiconductor technologies are needed to manage the increased power fueling this new era. In this context, imec is expanding its portfolio of GaN power technologies towards lower and higher voltage ratings to address the overall power conversion chain as well as moving to 300mm to aggressively scale device dimensions and to benefit from the most advanced processing tool capabilities.
X-ray diffraction methods are a very important non-destructive tool in analysis of thin films and bulk crystals alike. The ability to very accurately measure lattice d-spacings in a variety of geometries provides structural information, not only about lattice parameters, phase identification and crystal orientations, but also about different metrics of crystal and film quality. For thin films, obtainable parameters include composition and relaxation, micro-strain, stress, mosaicity, lateral and vertical correlation lengths and crystallite size, microscopic tilts and twists, dislocation density, as well as layer thickness, roughness / diffuseness, and density. For bulk crystals, X-ray diffraction can be used to determine crystal quality via rocking curves, and crystal orientation, for example the offcut magnitude and direction. In this work we present the capabilities of a few different laboratory diffractometers. We demonstrate several ways in which Reciprocal Space Mapping (RSM) can be performed, such as coplanar Ultrafast RSM using area detector or non-coplanar RSMs from fiber textured films. We compare several in-plane geometries on Empyrean and on X’Pert3 MRD (XL). We demonstrate the benefits of using a rotating slit in combination with an X-ray lens for consistent sample illumination at any Chi tilts, improving the quality of texture, non-coplanar RSM, and in-plane measurements. Next, we focus on the ability to make the analysis of X-ray reflectivity less model-dependent, by using our patented free-form analysis method. This can be especially in research process in cases when the layer model is difficult to build - either because of oxidation, interlayer formation, density gradients, or any other processes that would need to be explicitly known in advance to be included in a model. Finally, we present work on the rapid orientation determination of bulk crystals (wafers).
The epitaxial growth of group 13-nitride semiconductors (GaN, AlN, and AlGaN alloys) for the mass production and fabrication of high-frequency and high-power devices relies on metalorganic chemical vapor deposition (MOCVD) using metal-organic molecules, also called precursors. While this growth method ensures high productivity and low operation costs compared to other methods, its most significant disadvantage lies in the presence of carbon atoms in the precursors, which are unavoidably incorporated into the epitaxial layers and hamper the performance of most types of fabricated devices. Carbon-free precursors for the CVD process could enhance the performance of high-frequency and high-power nitride-based devices while maintaining growth capability in industrial equipment. In this work, we implement gallium- and aluminum-brominated precursors, which contain no carbon atoms, to grow GaN and AlN layers in an industrial CVD system. We compare the results of this alternative CVD process with the conventional method using trimethyl precursors through several characterization techniques, indicating a clear reduction in optically active carbon related defects.
This presentation highlights VisIC Technologies’ latest D3GaN technology, integrated into power modules for inverters driving electric motors in battery electric vehicles. Dyno tests achieved over 130 kW, surpassing SiC performance with the same e-machine. We will present WLTP efficiency results, switching loss data, and insights on implementing lateral GaN in real-world power modules. The talk also addresses key system-level design considerations and limitations when using lateral versus vertical devices.
After establishing a strong foothold in consumer and mobile power, most notably fast chargers, GaN is now progressing into applications where scale, reliability, and system efficiency are critical. The global GaN power market is expected to approach $3 billion by 2030, reflecting this shift from volume-driven adoption to platform-level integration. The next phase of growth is being shaped by datacenters and electrified transportation. In AI datacenters, NVIDIA’s engagement with wide band-gap device suppliers highlights GaN’s role in enabling higher-efficiency power delivery, particularly in 800 VDC architectures designed to reduce losses and improve rack-level power density. At the same time, the automotive sector is adopting GaN for both onboard and off-board charging, driven by efficiency, bidirectionality, and compactness requirements. These market dynamics are reshaping the GaN ecosystem itself. As adoption moves toward high-volume, the industry is seeing deeper vertical integration, and the arrival of established power semiconductor players such as onsemi. Their entry reflects a shift in OEM expectations: from discrete performance advantages to long-term efficiency. Together, these trends mark GaN’s evolution from a specialist technology into a strategic pillar of the power semiconductor industry, supported by a broader, more mature, and increasingly diversified supplier base.
This presentation will focus on the realization of vertical GaN power devices grown on foreign substrates by employing temporary wafer bonding for mechanical support during substrate thinning and backside etching, complemented by metal bonding for heat sink and drain contact integration. Multiple device architectures, comprehensive process flows, and experimental results will be presented and analyzed.
Atomera is commercializing a proprietary epitaxial technology, known as MST® (Mears Silicon Technology™), across a broad technology space, from power and analog electronics, through RF devices to the most advanced gate-all-around (GAA) logic applications. Experiments conducted with Texas State University (Prof. E. Piner) and Sandia National Laboratories, where a thin layer of MST is deposited on Si (111) substrates prior to process-of-record GaN epitaxy, have demonstrated higher crystal quality of the GaN stack and improved electrical characteristics in fabricated GaN devices. Further development and commercialization efforts are underway.
The rapid expansion of artificial intelligence (AI) infrastructure is reshaping global semiconductor demand. AI-driven data centers require highly efficient power conversion and ultra-fast optical interconnects, accelerating the adoption of SiC and GaN for power electronics, as well as InP- and GaN-based materials for lasers and micro-LEDs used in optical communication. Transitioning these technologies to high-volume manufacturing requires industry-leading epitaxial uniformity, reproducibility, and cost efficiency on wafer sizes scaling from 150 mm up to 300 mm. Increasing wafer diameters place additional demands on thermal management, process stability, and yield control. This contribution highlights how our products address these requirements by enabling high throughput and high epitaxial yields for the growth of SiC, GaN, as well as InP- and AsP-based materials. By combining advanced reactor design with optimized process control, we enable reliable, scalable, and cost-effective high-volume production of compound semiconductor devices powering the AI-driven era.
The sustained human presence on the Moon will require a highly available and reliable power system comparable to modern terrestrial utility grids. This system must provide effective fault isolation, autonomous protection, and coordinated operation across multiple distributed sources and loads. These elements will be separated by distances ranging from hundreds of meters to several kilometers, and under these conditions low voltage distribution is not viable. Transmission losses become too high, and the required cabling mass is incompatible with launch constraints. In addition, the power infrastructure must achieve exceptional reliability and rely on radiation tolerant components. Radiation hardened high voltage GaN technology is currently the only practical solution capable of closing this technological gap and enabling the power system architectures required for long term human operations on the lunar surface and beyond.
Threading dislocations (TDs) are critical crystalline defects in GaN-based materials, significantly impacting the performance, reliability, and lifetime of electronic and optoelectronic devices. We present Revelios, a semi-automated, non-destructive crystalline defect metrology software prototype based on electron channeling contrast imaging (ECCI). Revelios SW prototype enables large-area acquisition, automated stitching, detection and classification of TDs into a-, c-, and a+c-types. Dislocation type is determined by combining data acquired at different diffraction conditions and analyzing the black-white contrast orientation with respect to the set diffraction vector. Validation against expert manual evaluation shows a detection accuracy of 94% and a classification accuracy of 79%. These results demonstrate that Revelios SW prototype provides a robust and scalable solution for high-throughput GaN defect metrology and could be suitable for epitaxial process optimization and manufacturing control. Automation significantly increases throughput and reliability, supports efficient quantitative TD analysis, and makes the methodology accessible to less experienced users.
As RF GaN HEMTs advance toward higher frequency and power density, both material quality and reliability are becoming critical. This presentation introduces TES’s Tunable Epi System and discusses how fast gas switching and flow control enable high-quality AlN buffers, abrupt interfaces, and uniform GaN/AlGaN epitaxy to support scalable RF GaN production.
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Achieving commercial microLED adoption requires scalable, cost-effective manufacturing compatible with established semiconductor infrastructure. This presentation discusses GaN-on-Si epiwafer technology as a pathway toward high-volume microLED production using standard silicon fabs. We outline progress in 200 mm manufacturing, yield optimisation and wafer-to-wafer uniformity, and explain how collaboration with LED manufacturers enables rapid scaling. The approach also enables future migration to 300 mm substrates and integration with logic wafers, supporting emerging applications such as high-density displays and optical interconnects for AI systems.
System-on-panel (SoP) integration enables the convergence of light emission, sensing, control, and power management directly on a single substrate. This work presents a microLED-based SoP platform enabled by VueReal’s MicroSolidolid Printing™ process, allowing scalable, high-yield transfer of heterogeneous microdevices onto large-area panels. In addition to microLED emitters, the platform integrates microdrivers, microsensors, and photovoltaic elements for power scavenging. Parallel, cartridge-based MicroSolid Printing™ enables precise placement and tight coupling of these functions, overcoming scalability and cost limitations of conventional transfer methods. The resulting SoP architecture supports distributed intelligence and multifunctional smart surfaces for next-generation display applications.
CEA is working on a massively parallel MicroLED based optical links for point to point interconnects (xPU/xPU, xPU/HBM) to be used on board and in rack in HPC and data centers. They could enable, for example, pooled or shared memory / GPU architectures. Our approach combines device and circuit optimization, 3D integration such as hybrid bonding & high density TSVs, and system modelling, enabling scalable fabrication on 200 mm and 300 mm in standard foundries. We are aiming to reach
STMicroelectronics' began researching SiC in June 1996 with the physics department of University of Catania and the CNR national research institute shortly after, forming an ecosystem to foster leading edge innovation. Over the years, ST established a full vertical supply chain from raw material to the final device, with processed wafer sizes evolving from 2” to the current 8” standard allowing high volume production. Today, more than 5 million vehicles are powered by outstanding ST SiC devices and modules, and the automotive market will continue driving the rapid rise in demand and innovation surrounding this extraordinary semiconductor technology.
Modern monocrystal applications across semiconductor, aerospace, life-science, and consumer sectors depend on materials with consistent structure, minimal defects, and reliable performance. This presentation outlines broad developments in scalable growth methodologies and quality-focused production practices that support more uniform substrates, improved end-use reliability, and a stronger European footprint in the global monocrystal landscape.
Shrinking margins in SiC manufacturing demand unprecedented control over material quality and process stability. This presentation examines how advanced analytical and metrology techniques enable early defect detection, process consistency and yield improvement across SiC substrates and epitaxial layers. Attendees will gain insight into how precision measurement drives improved reliability and competitive advantage in SiC device production.
This speech explores electrical parametric characterization techniques for wide bandgap semiconductor wafers and devices, focusing on SiC and GaN technologies. It addresses Tektronix Keithley solutions to measure key parameters such as IV, CV, leakage, breakdown, mobility, and defect-related signatures, and explains how these metrics link material quality to device performance and reliability. Emphasis is placed on wafer-level testing, probing control, and data analysis to enable early process control and yield learning. Practical case studies illustrate challenges unique to wide bandgap materials, highlighting best practices for accurate, repeatable, and scalable characterization in manufacturing and R&D environments, worldwide adoption.
Silicon carbide (SiC) has emerged as a key wide-bandgap semiconductor for next-generation power electronics, driven by increasing demand for high-efficiency, high-voltage, and high-temperature operation in applications such as electric vehicles, renewable energy systems, and industrial power conversion. To address the need for scalable and manufacturing-ready advanced SiC technologies, the Institute of Microelectronics (IME), A*STAR, Singapore, has established a 200-mm open-innovation SiC pilot line. This talk provides an overview of advanced SiC technology platforms developed recently. The pilot line offers an integrated and flexible environment for the co-development and evaluation of next-generation SiC power device technologies, materials, and processes with emphasis on wafer-level uniformity, cost efficiency, and manufacturability. Besides high-quality fabrication, our pilot line enables rapid learning cycles for partners. Key technology modules spanning from SiC epitaxial growth, high resolution lithography, ion implantation, advanced trench processing, gate dielectric engineering including high-K, Ohmic contact formation, and full device integration, alongside ongoing progress in backend integration and power module packaging will be introduced in the talk.
In the compound semiconductor industry, a wide variety of materials is used to manufacture different devices such as LEDs, sensors, and imagers. Because these materials are uncommon compared to silicon, their processing requires different technologies and process steps. In this environment, any loss in yield has a significant negative impact on production efficiency and cost. One critical process step is wafer dicing, which is known to be very contaminating and can strongly reduce yield due to particle generation and surface contamination. An effective post-dicing cleaning process is therefore essential to recover and improve yield. SicOzone™ enables an efficient post-dicing cleaning step that improves wafer cleanliness and supports higher overall yield.
SiC based power semiconductors are meanwhile established elements in the library of engineers designing power conversion circuits. Beyond the classical range of applications, the features delivered by the state of the are solid state components open up new areas for the utilization of semiconductor-based elements. Prominent examples are circuit breakers especially for DC based networks and solid-state transformers which eventually leave their status of being just an academic passion. This is mostly driven by the fact that the whole network of electrical energy is facing a transition from simple unidirectional flows towards intelligent multidirectional energy flows and the growing trend of using more efficient DC networks. Especially the new architectures of high-performance (AI) data center power supplies will drive this transformation. In this field, due to the outstanding features of the new components also a leapfrog in system performance is enabled. Key benefits like loss and material saving as well as replacement of outdated electromechanical solutions are just a few examples. Finally, the importance of suitable package technologies for the success of wide band gap power devices will be highlighted.
Thermal processing plays a critical role in achieving uniformity, defect reduction and performance stability in SiC production. This presentation explores advanced furnace technologies and process optimisation strategies that support consistent substrate and epitaxial quality. The session highlights how controlled thermal environments enable higher throughput, reduced variability and enhanced device reliability for next-generation SiC power electronics.
As SiC manufacturing scales to 200 mm wafers, yield is increasingly limited by surface contamination, crystalline quality, and thin-film uniformity. This talk presents an integrated approach using inline and offline TXRF, HRXRD, and XRR to quantify metal contamination, strain, defects, and film properties, enabling predictive process control and prevention of yield excursions across SiC fabs.
The transfer of innovation from Lab-to-Fab requires Fab-compatible processes and protocols in Labs. VECTOR instrument combines key capabilities such as process characterization, lithography process control, defect review, and inspection in one automated SEM. Through various examples, this presentation highlights the capabilities of this new tool and its contribution to the transfer of cutting-edge nanotechnologies into new industrial devices.
In this golden era of power semiconductors, SiC has established itself as a viable alternative to Si thanks to its orders of magnitude improvements in the key figures of merit, field proven quality/reliability and a reasonable component cost premium that enables substantial cost/Ampere savings at the system level. With industry trends toward more aggressive system cost/performance targets, the SiC industry continues to deliver advancing new technology nodes and more modern manufacturing from increased wafer diameter. In the other industry trend to replace conventional electromechanical solutions, SiC emerges as the power semiconductor of choice for first implementations of smart solid-state solutions with increased functionality. This presentation highlights onsemi’s role as a valued partner of SiC solutions to catalyze these transformations.
Thanks to advances in InP substrate and epitaxial growth technology, 150 mm InP wafers have become commercially available in recent years. Scaling to the 150 mm wafer size is one of the most effective approaches to reducing the cost of InP photonic devices. In this paper, we demonstrate our newly developed InP etching results on 150 mm wafers using the PlasmaPro100 Cobra300 system equipped with a hot electrostatic clamping (ESC) system. After process development, we achieved a vertical profile with an etch rate exceeding 500 nm/min and a uniformity better than ±3%. Importantly, the sidewall and bottom surfaces-both critical for photonic devices-are very smooth.
In this presentation, we introduce novel strain-compensated AlGaN/InGaN DBRs for GaN-based VCSELs. By adopting an asymmetric structure in which the InGaN layer is thicker than λ/4 and the AlGaN layer is thinner than λ/4, and by compensating for strain, we achieved a larger refractive index contrast compared to conventional λ/4 structures. Through a high growth rate of 1–several µm/h and minimizing growth interruption, we successfully fabricated DBRs with over 99.9% reflectivity in approximately 5 hours. With further optimization, this technology has the potential to reduce growth time to 2–3 hours, comparable to GaAs-based DBRs, and could significantly lower the manufacturing cost of GaN VCSEL wafers.
Surface emitting laser and active devices have some key advantages in terms of size, scale-up, ease of packaging and cost. In this talk we explore the development of PCSEL / VCSEL / meta-structure devices. Here we will discuss some of the design, manufacture considerations for the devices. We will also discuss their readiness for emerging applications.
The rapid expansion of AI is accelerating the demand for faster, more efficient optical transceivers, putting pressure on manufacturers to deliver higher performance at scale. At the heart of these systems are Indium phosphide (InP) lasers, enabled by high-quality MOCVD epitaxy. This presentation will introduce Veeco’s innovative Lumina® series for As/P epitaxy and highlight the key performance, uniformity, and productivity benefits that make it the ultimate MOCVD production platform for scalable InP laser manufacturing, while also supporting a broad range of optoelectronic devices such as microLED and high-performance multi-junction solar cells.
Vertical-cavity surface-emitting lasers (VCSELs) emitting in the 800 – 1100 nm range play a significant role in short-reach data communication as well as 3D sensing applications. High-volume VCSEL production on 150-mm (6-inch) diameter substrates is becoming standard and work has begun on transitioning to 200-mm (8-inch) production. Here we discuss the relative advantages of GaAs and Ge large area substrates, the reduction in substrate thickness that can be achieved using Ge and the latest results for high speed generic VCSEL designs.
Photonic crystal surface emitting lasers (PCSELs) offer high beam quality, power scalability, and integration potential for advanced optical communications. We demonstrate PCSEL enabled free space links, orbital angular momentum (OAM) transmission in fiber and free space, and SiP compatible architectures. Experimental results highlight mode purity, low divergence, and efficient coupling across diverse platforms. PCSELs are poised to reshape spatial multiplexing and integrated photonics in next generation networks.
Compound semiconductor optoelectronics underpin a wide range of modern technologies, yet further progress increasingly depends on manufacturable device architectures. In this talk, we introduce a novel electrochemical approach for engineering the refractive index of compound semiconductors, enabling device structures that are difficult to realize using conventional epitaxial or dielectric methods. As a representative example, we demonstrate manufacturable InP-based short-wave infrared (SWIR) vertical-cavity surface-emitting lasers (VCSELs) using nanoporous semiconductor structures. This platform provides precise index control, robust optical confinement, and wafer-scale scalability. Efficient continuous-wave operation with power conversion efficiency up to 30% is achieved, together with excellent reliability and reproducibility. Potential applications in SWIR sensing, digital health, and emerging optical interconnects are discussed.
Silicon-Carbide became the most important compound semiconductor material in the world, helping electrifying everybody's daily life. After material suppliers improved 6" crystal growth processes for a long time, the transition from 6" to 8" was performed within just a few years, while already being passed by by new applications demanding more and cheaper wafers and downstream processes, which are only able to be served with 12" wafers. Lapmaster Wolters launched its AC 1500 SiC double-side polisher, capable of polishing 8" and 12" wafers, already in 2023, providing a reliable and future-proof application base for everything that’s lays beyond 8"! This talk covers detailed insights on advanced material processing enabling high-quality and Cost of Ownership improved wafer manufacturing.
A soft-switching based Inverter Topology for high Efficiency Applications“. With the advent of SiC-based devices, power losses in inverters have been significantly minimized compared to Si-based IGBTs, thereby resulting in a high level of efficiency. As SiC devices continue to mature, the Rds*A figure of merit continues to improve, bringing down the losses further. However, there are application boundaries such as the maximum permissible voltage slew-rate which still limit the switching performance. Therefore, it becomes necessary to pursue advanced topologies in order to overcome these challenges. This talk presents a soft-switching based topology which enables reaching a higher level of efficiency. Experimental results are also presented to confirm the benefits of the topology.
Beta-phase gallium oxide (β-Ga₂O₃) has emerged as a competitive ultra-wide bandgap (UWBG) semiconductor for next-generation RF electronics, leveraging its exceptional material properties—including an ultra-large bandgap (4.7–4.9 eV), high theoretical breakdown field (8 MV/cm), and electron saturation velocity (2×107 cm/s). Crucially, its unique capability for low-cost melt-growth of bulk substrates enables high-quality, large-scale wafer production, overcoming economic barriers faced by other UWBG materials. It is generally accepted that the low electron mobility and extremely low thermal conductivity are major obstacles towards realizing high performance β-Ga₂O₃-based RF power FETs. This presentation highlights our group’s recent breakthroughs in advancing β-Ga₂O₃-based RF power devices and technologies. Here we report heterogenous integration of single-crystal gallium oxide thin film onto high thermal conductivity substrate and explore the great promise of β-Ga₂O₃ for future high-voltage, high-power and low-noise RF electronics.
Gallium oxide is emerging as a leading ultra-wide bandgap candidate for next-generation high-voltage power electronics. This presentation shares recent epitaxy results from Swansea’s new growth platform, including material quality, defect management and scalability considerations. Beyond growth, we outline complementary efforts in device simulation, fabrication and electrical characterisation, demonstrating how integrated research accelerates performance optimisation. By connecting material properties to device behaviour, we assess the realistic opportunities and remaining barriers for gallium oxide in power applications, and compare its trajectory with other ultra-wide bandgap contenders.
Ultrawide bandgap semiconductors, such as Gallium Oxide (Ga2O3) and Aluminum Gallium Nitride (AlGaN), with their high breakdown voltage offer new opportunities for power electronics though the challenge often exists that doping as well as making good ohmic contacts become increasingly challenging the larger the bandgap. Latest results will be presented including reliable 4kV Gallium oxide diodes; we also discuss are there opportunities to develop this Ga2O3 power electronics technology on substrates other than bulk Ga2O3 substrates, to further accelerate scalability. Results on AlGaN and how to achieve good ohmic contacts and first device demonstrations will also be highlighted.
Semiconductor-based power electronics is a key technology for solving the greatest challenge facing society - sustainable energy generation. This challenge is to be tackled by developing modulation-doped β-(AlxGa1-x)2O3/Ga2O3 heterostructures with high electron mobility for highly efficient power transistors. In Ga2O3 in particular, this approach to increase the charge carrier mobility promises a high innovation potential, as it was also theoretically predicted that the significantly limiting scattering process on polar-optical phonons would be screened. If this scattering process is suppressed, a similar charge carrier mobility is expected in Ga2O3 as in silicon, as the effective electron mass is similar. Effective screening of polar-optical phonons only occurs at a carrier density in the two-dimensional electron gas (2DEG) around 1013 cm-2, which requires a conduction band discontinuity of at least 1 eV. Theoretical predictions show that this requires an aluminum content of at least 50% (x ≥ 0.5) in the barrier. This structure has not yet been realized and is to be developed for the first time in the All-GO-HEMT project. The requirements for high crystalline perfection, a homogeneous layer thickness and smooth interface with a high Al content and delta doping over the entire substrate size of up to 2 inches must be met to provide a material basis for more efficient power electronics.
The Rump Session is an entertaining very open discussion session in a hot topic area of interest to most conference attendees - The AI Chip Ecosystem Future. The session takes place in the evening alongside the drinks reception. Our outspoken and opinionated hosts will stimulate lively audience discussions though structured debate, polls and open-floor participation. No ties. No scripts. Just sharp minds and sharper opinions.
