Presentations at CS International 2025 are grouped into 5 key themes which collectively provide complete coverage of the compound semiconductor industry.
If you are interested in speaking at CS International 2025, please contact info@cs-international.net or call +44 (0)24 7671 8970.
To achieve the goals of decarbonization and reduction of energy consumption higher efficient electrical system solutions are required. Here GaN with its intrinsic superior material properties over Si is a key enabler for advanced semiconductor devices meeting those requirements. To sustain the acceleration of compound semiconductor solutions AIXTRON addresses the increased demand in performance, fab efficiency and cost per wafers by the introduction of new products and product variances. In this talk we will present the recent progress on our 2023 launched G10-GaN platform for 150mm & 200mm wafer size as well as outstanding results on 300mm GaN for a variety of GaN based applications.
Although qualified up to 650 V voltage operation, lateral GaN devices are subject to severe limitations for higher voltage applications such as a large device size, surface trap related reliability concerns or the absence of avalanche breakdown due to the peak electric field at the gate vicinity. This led to vertical GaN development, which is under extensive investigations worldwide as all the above-mentioned issues could be cured. State-of-the-art vertical GaN devices are fabricated on bulk GaN substrates, thanks to the high quality of the substrates in terms of low dislocation density and low impurity concentrations. However, they are prohibitively expensive, and only rather small area substrates are available. In this talk, we will describe the current status of GaN-based fully vertical devices grown on large diameter silicon substrate with a particular focus on ongoing efforts in this domain, which are part of the EU-funded YESvGaN project. Despite the common belief about the limited drift layer thickness or wafer diameter due to the large mismatch in coefficient of thermal expansion (CTE) between Si and GaN, we will show that a local substrate removal with suitable related growth and process optimization enabled outstanding initial achievements such as extremely low on-resistance in 1200 V-class fully vertical pn diodes with avalanche breakdown capability. Furthermore, the enhancement of the mechanical robustness of the resulting membranes during the fabrication process enables the implementation of a heat sink based on thick Copper and consequently high on-state current spreading well-above 10 A.
Gallium Nitride (GaN) power devices have seen increasing adoption in various industries due to their ability to operate at higher efficiencies, frequencies, and temperatures compared to traditional silicon-based devices. The ramp-up in GaN based power devices is driven by key factors such as their expanding use in consumer electronics, electric vehicles (EVs), data centers, and industrial applications. Traditionally, X-ray metrology involved manual equipment configuration, analysis, and reporting, which could be time-consuming and prone to human error. Over the years, Bruker has automated these processes, significantly improving throughput and accuracy. Automated X-ray metrology systems now provide real-time, in-line measurements that are integrated directly into the manufacturing process, allowing for immediate feedback and corrective actions when necessary. This enables manufacturers to accelerate R&D, production line ramp-up, and maximize yield, thus shortening time to market and improving profitability.
The rapid growth of electric vehicles and power electronics has driven a surge in demand for gallium nitride (GaN) due to its exceptional properties for high-performance applications. Semilab’s metrology solutions address key challenges in GaN material characterization and device manufacturing. This presentation explores the structural and compositional complexities of GaN and highlights the Semilab SPL product line as a powerful solution, alongside other GaN metrology use cases. With these advancements, Semilab aims to support the detection of impurities with comprehensive metrology solutions, enabling the seamless integration of GaN technology while ensuring superior device performance and reliability.
Gallium Nitride continues to make inroads into the Power Electronics market due to its higher conversion efficiencies and superior performance. While the initial adoption was limited to fast chargers, GaN power devices are now looking to other applications such as power supplies for datacenters and electric vehicles. Analysts continue to project a five-fold growth over the next 5 years as market share for GaN power devices continues to grow. To enable this growth, it is important for GaN power devices to be cost-competitive, and 300mm offers a pathway towards significant cost reductions. Metal Organic Chemical Vapor Deposition (MOCVD) technology is an important first step in the manufacturing of GaN-based power devices. As such, this deposition step plays a key role in the performance and cost of such devices. Veeco’s PROPEL® 300mm MOCVD tool based on single-wafer technology enables the highest quality deposition at the lowest cost per device. In this presentation, we focus on key improvements to Veeco’s PROPEL® 300mm MOCVD tool to enable penetration of GaN- based power devices.
Gallium Nitride (GaN) is a wide-bandgap semiconductor with exceptional properties, making it an ideal material for the new generation of optoelectronic and electronic devices such as UV LEDs, micro-LEDs, and RF components. Molecular Beam Epitaxy (MBE) has proven to be an effective method for growing high-quality III-Nitride epilayers due to its precise control over layer thickness, composition, purity and low growth temperature. This abstract explores the emerging growth opportunities for Nitride MBE production Machines, with a particular focus on the competitive advantages it offers in the development of next generation’s devices, driving the future of optoelectronic and electronic technologies.
The power GaN device market is set to soar beyond $2 billion by 2029, driven by its adoption in fast-charging consumer electronics, automotive powertrains, and data center power supplies. With high efficiency and superior performance, GaN is reshaping multiple industries, fueling demand for compact and energy-saving solutions. Over the past years, the supply chain has evolved through strategic acquisitions and investments, consolidating key players and accelerating innovation. As GaN continues to disrupt traditional power electronics, the question remains—where is this rapidly growing market heading next? This talk will explore the latest trends, opportunities, and challenges shaping the future.
Gallium Nitride (GaN) transistors have emerged as pivotal components in personal electronics, enabling lighter, smaller, and faster-charging devices. Yet, their full potential remains untapped. GaN technology's role in the digitalization revolution is still underestimated. As we transition into the post-silicon era, GaN's superior efficiency and high-frequency operation open avenues for breakthroughs in AI computing and beyond. Strategic investment in GaN applications is essential to capitalize on its opportunities for economic growth and technological advancement.
A novel workflow for analysis of a GaN device is demonstrated by combining state-of-the-art lamella preparation and (S)TEM analysis. Lamella sample preparation using a combination of noble ion sources is used to minimize damage and contamination, enabling accurate epi-layer characterization, chemical analysis, and electric field mapping via (S)TEM. A pristine lamella was prepared from an aluminum gallium nitride (AlGaN/GaN) on sapphire epitaxial stack by switching between ion sources, namely xenon and argon plasma ions, rather than a traditional Ga-FIB system. Subsequent analysis in (S)TEM enabled the examination of electrical behavior, atomic-scale chemical mapping, lattice-resolved interface imaging, and strain and grain orientation analysis. This innovative workflow demonstrates significant potential in enhancing the analytical accuracy for the compound semiconductor industry by allowing the identification of structural and material defects and quality variations at sub-nanoscale dimensions, thereby decreasing learning cycle time.
The development of compound semiconductor (CS) components, such as GaN-based power devices, requires precise and flexible metrology for process control. In this study, we demonstrate how the Raith VECTOR, an advanced SEM-based metrology platform, enables high-throughput wafer-scale CD measurements and process monitoring for GaN HEMT structures. Using automated workflows, we achieved precise placement accuracy, machine learning-driven defect detection, and repeatability within and across wafers. Additionally, a Design of Experiments (DOE) was conducted to optimize E-beam lithography (EBL) parameters. VECTOR’s automation and stability make it a versatile solution for both research and production in CS fabrication.
X-ray characterization of compound semiconductors has been used for over three decades, extensively in the lab space and relatively limited in the fab space. However, in the past five years the demand for X-ray metrology is noticeable increased, due to the introduction of new materials for power devices like SiC and GaN, photonics, quantum computing and new complex thin film structures. In this presentation, I will provide an overview of the X-ray metrology solutions and the progress in the X-ray technology which have enabled the transition from the lab to a fab environment.
MicroLED displays are set to transform the future of display technology, offering superior brightness, energy efficiency, and longevity compared to traditional displays. As the demand for high-performance displays continues to rise, overcoming the challenges of photonic packaging becomes increasingly important. This presentation focuses on the precise replication of lenses, ensuring tight specifications for alignment accuracy and maintaining minimal residual layer thickness and variation below the lens.
MicroLED technology promises to revolutionize displays across industries, from augmented reality to automotive applications. However, the challenge of efficiently transferring millions of microscopic LEDs has long been a barrier to widespread adoption. This presentation explores the innovative MicroSolid Printing process, which addresses the critical 'transfer challenge' in microLED manufacturing. We'll discuss how this technology enables high-throughput, high-yield production of microLED displays, its implications for display quality and energy efficiency, and its potential to unlock new possibilities in human-machine interfaces. Attendees will gain insights into the latest advancements in microLED fabrication and their impact on future display technologies.
Micro light emitting diodes (microLEDs) are the ideal display technology due to their high brightness, fast response, long lifetime, and energy efficiency, yet their enormous market potential is hindered by technical and cost-prohibitive manufacturing challenges. Q-Pixel’s revolutionary technologies include 1) single fully color-tunable pixels, without red/green/blue (RGB) subpixels and 2) assembly technology for high-yield, high-throughput, large area microLED displays orders of magnitude faster than traditional mass transfer, at significantly reduced cost. Q-Pixel’s technologies simplify display assembly, reduce manufacturing costs, and enable world-record pixel densities for ultra-high resolution displays suitable for AR/VR/XR. Q-Pixel’s Tunable Polychromatic-LED technology has enabled world records for highest full color display (10000 PPI), smallest full color pixel (1 micron diameter) and world’s highest resolution (6800 PPI microLED) active-matrix color display.
Explores pioneering advancements in mass-producing and commercialising MicroLED microdisplays for Augmented Reality (AR). It covers Porotech’s unique technology platforms and initiatives to scale production, including cost reduction, supply chain optimisation, and yield improvement. It also discusses the potential market impact of AR applications and how MicroLED can drive innovation in and beyond consumer electronics, enterprise, and industrial sectors.
Over the last twelve years, Aledia has developed two unique 3D microLED technologies using nanowire growth on 200 and 300 mm silicon substrates. In this presentation, we will first describe how the efficiency of the devices is not negatively impacted at smaller device sizes, making Aledia’s microLEDs an ideal solution for a wide range of displays, including wearables, automotive, and large displays. We will as well introduce another technology where directive light emission from the nanowires dramatically enhances efficiency for AR applications.
MicroLED technology finds itself at a pivotal moment, with the cancellation of Apple's 2024 project leading to strategic re-evaluations across the industry. Despite this challenge, MicroLED remains a strong contender for high-impact applications. In augmented reality (AR), LEDoS microdisplays are gaining ground, thanks to renewed optimism for AI-based solutions. The automotive sector is exploring MicroLEDs for innovative form factors and high-brightness displays. The market for large-screen TVs - over 100 inches - is also viable. However, widespread adoption depends on significant technological advances, next-generation manufacturing equipment and a strong supply chain. Overall, Yole forecasts a billion-dollar market by 2030 for MicroLED displays, but uncertainties remain before then.
SiC semiconductors are being deployed in a wide variety of use cases that demand robust high-voltage, high-performance operation from small form factor, high-power-density designs where stable and reliable operation is needed independent of temperature. Creating the best device technology enables the highest performance, efficiency, and reliability, which opens the opportunities for success. Navitas’ ‘trench-assisted planar’ technology provides the best-in-class performance in the field, enabling high-yield manufacturing, fast and cool operation, and extended long-life reliability.
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We present here work on the orientation determination of bulk crystals for several different steps of wafer manufacturing (seeding, cutting, grinding, end control, etc.). X-ray diffraction is one of the standard analytical methods that are routinely utilized for both materials research and quality control. It is non-destructive and offers high precision and accuracy in lattice orientation measurements. The classic orientation method via rocking curves at different azimuthal angles is widely spread and yields results in 10-20 minutes for small off-orientations. For routine processes, this measurement time can adversely affect throughputs, and a faster solution is needed. Here we present a method two orders of magnitude faster, which determines an offcut magnitude in 10 seconds with precision of 0.003° 1σ. This is a strong improvement in methods compared to current industrial standards and enables control of each individual wafer at a throughput of up to 1 million wafers per automated wafer tool per year at single point per wafer. We will demonstrate the capabilities of this method with various examples and show how it can be used throughout the process chain, from seeding to wafering and ion implantation. The systems range from benchtops for quick check measurements to a fully automated robot-loaded wafer measurements via SECS/GEM protocol to automated boule glueing assemblies. Finding the orientation of a crystal on the diffractometer is only the first step. The sample then has to be transferred to the next processing step without losing the orientation. With our orientation transfer technology, we can enable, for example, accurate boule cutting and grinding. Combined with our stacking frame, it allows to attach up to twelve ingots of e.g. SiC to a saw beam for parallel cutting.
With the demand for power device technologies is growing across a broad variety of applications, device makers are developing production solutions leveraging multiple new material sets including Silicon Carbide (SiC), Gallium Nitride (GaN) and others. Growth in demand has driven wafer size migrations, 150mm-to-200mm and 200mm-to-300mm for SiC and GaN, respectively. These wafer size migrations have an impact on the incumbent process control technology’s ability deliver increased sensitivity defect detection technologies, while offering higher throughput than currently available on smaller wafer sizes and maintain relative cost parity in what is a very cost sensitive application space. This presentation addresses a few of the more fundamental challenges that can occur in the production of SiC and GaN based devices at these larger wafer sizes and explores solutions for the more critical process steps, including some novel and value adding hardware and software capabilities.
Independently from the material, wafer substrates undergo a long way from raw material to epi-readiness polishing results. The ongoing miniaturization of chip structures and the simultaneously increasing requirements for wafering processes, such like wafer slicing and surface finishing, generate a more and more complex environment for process developers and operators. The permanent pressure of working between Cost of Ownership effective processes and realizing the highest possible quality, ideally with maximized machine uptime and production yield challenge wafer manufacturers more than ever. Lapmaster Wolters solves these challenges with its innovative Lapmaster Wolters Precision AI approach, which uses data-based advanced analytics of dozens of data sources from its slicing and polishing machines to help process developers and operators to do both – Maximize the desired wafer quality while minimizing the overall Cost of Ownership by preventing time-consuming downtimes or costly material losses. The usage of comprehensive data-based software solutions will revolutionize the way of process development, since sophisticated coherences and parameter dependencies become visible and easily interpretable, even for unexperienced staff.
In the domain of SiC and GaN semiconductor production, understanding and optimizing heating technologies can lead to significant overall cost savings. These technologies are integral in processes like Physical Vapor Transport (PVT), Epitaxy, Pysical Vapor Deposition (PVD) and Rapid Thermal Processing (RTP). It can not only save costs, but also stabilize or improve process results. The Heating Technologies involved are provided by different vendors, with different Power Supplies and Specification - all of the Power Supplies can provide basically similar temperatur ranges or target temperatures. However, even if the direct heating result in the product is identical, different costs are effective. Simulations and measured Power Supply parameters show that e.g. THD (total harmonic distortion) can be considerably different and can cause severe OPEX cost increase in terms of energy cost and susceptor or graphite reactor wear off. Hence if we look to cost the TCO (total cost of ownership) we find that this is the right parameter to look at and can bring out very different cost results for the customer compared if you only look to the initial purchasing cost of a Power Supply. Combination and integration of different heating options e.g. the combination of microwave solid state power generators (µW-SSPG) with Induction Heating Generators can substantially shorten process time for e.g. MOCVD or RTP processes. The µW-SSPGs can control extremely homogene heating pattern on Si or SiC Wafer Substrates. It allows to heat up Substrates from room temperature to app 600 °C within < 30 seconds. Above 600 °C Substrates become conducting and a onset of a different heating method like induction is required to pick up the heated Substrate and bring it very fast to higher processing temperatures. Nevertheless we can show that processing temperatures can be reached in a substantial shorter heat up phase with even improved homogenity. CAPEX for a combination of Power Supplies are higher than for a single Power Supply on one hand, but can result in pretty improved production time results on the other hand.
In traditional semiconductor wafer fabrication facilities, wet etching and stripping processes are typically carried out in separate equipment. However, Siconnex equipment enables the integration of multiple processes within a single tool. This capability provides clear advantages, as it allows for several etching and stripping steps to be performed within a unified process flow. This integrated approach enhances wafer quality by improving uniformity and etch control, while also reducing the need for operator intervention. Furthermore, it optimizes chemical usage and enables more precise process control. An example process flow in the Back-End of Line (BEOL) for materials such as Ag (silver), Ni (nickel), Ti (titanium), and photoresist stripping highlights these benefits, demonstrating how integrated processing can streamline operations, improve throughput, and achieve higher-quality results.
The first part of the talk will focus on the latest achievements in non-contact and non-destructive measurement of stresses and defects in compound semiconductor substrates using the Scanning InfraRed Depolarization (SIRD) method. In the second part of the talk, the correlation between bulk and wafer inspection will be presented using a dedicated scanner designed for digital defect traceability. The system is intended for companies aiming to automate SiC puck quality assessment and optimize raw material allocation to downstream processes, such as laser splitting and multi-wire sawing.
Power, automotive, and IoT device manufacturers are constantly confronted with the simultaneous need to fulfill stringent quality requirements, boost productivity on their production lines, and reduce the associated cost of ownership (CoO). Inline inspection and measurement of high volumes of critical wafers is becoming increasingly crucial. SCREEN Semiconductor Solutions is addressing this specific market need with a portfolio of dedicated tools, specifically designed to reduce tool cost, footprint, downtime. The SCREEN Semiconductor Solutions proposal with the ZI-3500 is able to cover customer’s needs, with the front side micro inspection, for smaller and fine defects detections, to the back side and back side edge macro inspections to detect deposits and edge cracks that cause wafer damage, ensuring the large area coverage. While the ZI-3600 can even double the throughput capacity, these tools family can also achieve automatic defects classification, thanks to new advanced AI functions, reducing the operation time, and working time cost. On the thickness measurement front, the VM-3500 system offers spectroscopic reflectometry integrated with high-throughput features, while the RE-3500 system, combines single-wavelength spectroscopic ellipsometry, with triple reflectometry heads with the option to integrate the “trench shape measurement” application.
We will discuss dynamics in the semiconductor industry that are changing how we are engaging with the ecosystem. We will present several solutions enabled by Applied’s unique capabilities.
The production of InP and GaAs based laser and VCSEL structures requires tight process control during front end production. In-situ metrology during epi for process control is established and mandatory but not sufficient. Post-epi wafer mapping with photoluminescence and white light reflectance complements the in-situ metrology and allows for a much deeper analysis of the structures. Therefore, results from EpiX, LayTec’s best in class wafer mapper, in combination with analysis of in-situ data will be presented. Also, it will be demonstrated how metrology is employed further downstream during plasma etching of the epi wafers highlighting the high value of connected metrology along the manufacturing chain.
EXALOS recently demonstrated SLEDs exhibiting increased optical confinement factors (modal gains) at 512 nm by implementing an InAlN-based n-type cladding in the epitaxial structure. By leveraging the latter approach and by growth conditions optimization, here we demonstrate SLEDs devices at 525 nm and discuss their performance. A direct comparison with LDs realized from the same epitaxial wafer, exhibiting 10 nm longer emission wavelength, will be presented. This result, together with varied experimental data will allow us to elucidate the challenges faced when extending the SLED wavelength in the true green spectral range and beyond.
The rapid evolution of the space industry, driven by reduced costs to orbit and increased launch availability, has catalyzed unprecedented growth in the space sector and a surge of new startups. All space applications require reliable power sources, contributing to the expansion of the photovoltaic (PV) segment. Conventional space-grade multi-junction solar cells utilize a dual-junction MOCVD-grown GaAs epi-stack on a germanium (Ge) substrate, with lithography/PVD-based interconnections. To enable the anticipated 10-fold increase in production scale over the next decade, a fundamental transformation of these three key components - MOCVD growth, Ge substrates and metallization - is essential. Geopolitical factors have further complicated this landscape. Recent export restrictions imposed by the Chinese government have led to a more than twofold increase in the price of Ge raw materials. This work presents a solution that addresses these economic and material challenges by enabling the reuse of Germanium substrates. This approach lowers the cost of ownership and unlocks much greater potential for high-volume production of III-V solar cells on Ge substrates. In parallel, the growing consumer market is driving rapid advancements in photonic devices, such as micro-LEDs, long-wavelength Vertical-Cavity Surface-Emitting Lasers (VCSELs), and imagers operating in the Near-Infrared (NIR) and Short-Wave Infrared (SWIR) spectrums. While Gallium Arsenide (GaAs) substrates dominate current photonics device manufacturing, emerging research highlights the advantages of Germanium over GaAs. Photonic device manufacturing is traditionally the domain of III-V integrated device manufacturers (IDMs) and foundries. However, the development of cutting-edge photonic chips requires close collaboration between III-V companies and Silicon semiconductor/CMOS players to improve form factors, enhance device performance, and reduce production costs. This integration is currently constrained by the limited wafer size of GaAs and the contamination requirements of CMOS fabrication. Umicore addresses these challenges by developing 8” and 12” Ge substrates that bridge the gap between the III-V and semiconductor industries. Germanium’s compatibility with CMOS specifications and the larger wafer sizes facilitate integration with existing semiconductor processes. Additionally, substrate reuse technology supports high-volume photonics applications compatible with CMOS, positioning Ge as a critical enabler in both PV and photonics industries.
Vertical Surface Emitting Lasers (VCSEL) based on InP material are set to being deployed for volume and novel applications in the 1.3 µm to 2.3 µm wavelength range. As such they continue the successful deployment of the VCSEL technology for long wavelength applications that include high density optical data communications, gas sensing and 3D sensing. Vertilas highly energy efficient and top performing VCSEL products, based on a unique InP Buried Tunnel Junction concept, have been proven in demanding applications for well over 15 years. The technology and portfolio of single mode and multi mode VCSELs, as well as single emitters, 1D and 2D arrays will be presented along with long term reliability and key performance characteristics for existing and next generation markets.
We demonstrated over 20% wall-plug efficiency (WPE) of GaN VCSELs emitting at 420 nm wavelength. Such a high performance is achieved by the following three key technologies we have developed, 1) high-quality semiconductor-based (AlInN/GaN) distributed Bragg reflectors (DBR), 2) simple nano-height mesa for lateral optical/current confinements, and 3) in situ cavity length control with in situ reflectivity spectra measurement. Towards even higher WPE, we plan to include our additional technologies into the VCSELs, 4) low resistive tunnel junctions for p-contact and 5) highly conductive AlInN/GaN DBR for n-contact. In this talk, we show these technologies and update our VCSEL performances.
High quality, 2-inch diameter aluminum nitride (AlN) substrates have become widely available with 100mm soon to become commercial. These substrates have enabled growth of very high-quality aluminum-gallium nitride alloys which are pseudomorphically strained to match the lattice of the underlying AlN substrate. This high quality material has allowed the development of superior performance UVC LEDs at wavelengths shorter than 275nm.. In addition, the low extended defect density has made it possible to take advantage of distributed polarization doping. Pseudomorphic growth and distributed polarization doping have made the achievement of new devices possible, such as the UVC laser diode and far UVC LEDs.
Need to measure a deep UV LED, a mid infrared detector structure? Gone are the days when you needed to decide which detector, which optical grating, what wavelengths to scan in order to measure an optical spectrum. Compound semiconductors now span a range of wavelengths far beyond the capabilities of a single detector technology. So the solution? Use them all at once. The automated merging of spectral information obtained from Si and InGaAs detectors was mentioned at this event in 2021 as one of our on-going developments. Now that it is a standard feature, we are working on a new challenge: Spectral measurement from 200 nm to 5 um! We look at the latest technologies and tricks behind the scene that make this possible.
AlN is an emerging semiconductor offering dramatic and short-term exploitation in power switching, high temperature electronics, RF electronics and optoelectronics facilitated by breakthroughs in new doping technologies enabled by low temperature, non-equilibrium epitaxy. Contrary to common understanding, low-temperature, metal-rich vacuum processes are shown to have higher surface diffusion lengths than high temperature nitrogen-rich methods. AlN’s band structure facilitates dramatically higher performance than possible with GaN especially for p-type devices. ~1000-30,000,000 times improvements in the AlN n and p-type resistivities (
Bulk AlN substrates with high structural quality are best suited to exploit the full potential of AlGaN-based (opto)electronic devices. However, further development and commercialization is hindered by the lacking availability of high quality AlN substrates in terms of quantity and size. So far, the diameter expansion has been limited by the low lateral growth rates or the formation of defects. In this paper, we report on a fast increase of the crystal diameters by subsequent growth runs with huge expansion angles of about 45°. The high structural quality of the first seed generation can be preserved (dislocation density TDD ~ 103cm-2). First epi ready 2-inch AlN substrates are demonstrated. The process outlines a shortcut path to industrially relevant AlN crystal diameters of 100 mm or more compared to all other published expansion processes for bulk AlN crystals so far.
Gallium oxide is an ultra-wide bandgap semiconductor with the potential to enable efficient power electronic devices beyond the wide bandgap revolution. However, the high breakdown electric field that enables the potential benefits brings its own challenges in device engineering to realize these benefits. By engineering the electric fields with novel high-κ heterojunctions as well as reduced surface field and edge termination structures, we show how to unlock the high breakdown field of gallium oxide to realize the efficient power devices of the future.
(Ultra)wide bandgap metal oxide semiconductors including Ga2O3 and In2O3 have attracted enormous interests. They could offer markedly larger figures of merits for power and RF applications than other known semiconductors, as well as excellent scalability and low thermal budget. Thus they are promising for More Moore, More than Moore, and Beyond Moore applications. This talk will cover the potential of those large bandgap oxides for IC research.
Cubic boron nitride (c-BN), an ultra-wide band gap semiconductor with a band gap of approximately 6.4 eV, has emerged as a promising material for next-generation electronic and optoelectronic devices. Its exceptional thermal conductivity, chemical stability, and high breakdown electric field make it ideal for power electronics, extreme-environment applications, and possibly deep ultraviolet optoelectronics. Unlike diamond, c-BN has demonstrated multiple, relatively shallow impurity levels yielding n- and p-type doping, potentially enabling versatile device design. This talk will explore recent advances in c-BN synthesis, including high-quality crystal growth techniques. By addressing challenges such as scalable production and material uniformity, we highlight the transformative potential of c-BN in enabling next-generation semiconductor technologies.
